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L I N D O C # : 1842
SG1842/SG1843 Series
CURRENT MODE PWM CONTROLLER
T
HE
I
NFINITE
P
OWER
OF
I
NNOVATION
P
RODUCTION
D
ATA
S
HEET
DESCRIPTION The SG1842/43 family of control IC's provides all the necessary features to implement off-line fixed frequency, current-mode switching power supplies with a minimum number of external components. Current-mode architecture demonstrates improved line regulation, improved load regulation, pulse-by-pulse current limiting and inherent protection of the power supply output switch. The bandgap reference is trimmed to 1% over temperature. Oscillator discharge current is trimmed to less than 10%. The SG1842/43 has undervoltage lockout, current limiting circuitry and start-up current of less than 1mA. The totem-pole output is optimized to drive the gate of a power MOSFET. The output is low in the off state to provide direct interface to an N channel device. The SG1842/43 is specified for operation over the full military ambient temperature range of -55C to 125C. The SG2842/43 is specified for the industrial range of -25C to 85C, and the SG3842/43 is designed for the commercial range of 0C to 70C.
K E Y F E AT U R E S
s OPTIMIZED FOR OFF-LINE CONTROL s LOW START-UP CURRENT (<1mA) s AUTOMATIC FEED FORWARD COMPENSATION s TRIMMED OSCILLATOR DISCHARGE CURRENT s PULSE-BY-PULSE CURRENT LIMITING s ENHANCED LOAD RESPONSE CHARACTERISTICS s UNDER-VOLTAGE LOCKOUT WITH 6V HYSTERESIS (SG1842 only) s DOUBLE-PULSE SUPPRESSION s HIGH-CURRENT TOTEM-POLE OUTPUT (1AMP PEAK) s INTERNALLY TRIMMED BANDGAP REFERENCE s 500KHZ OPERATION s UNDERVOLTAGE LOCKOUT SG1842 - 16 volts SG1843 - 8.4 volts s LOW SHOOT-THROUGH CURRENT <75mA OVER TEMPERATURE
PRODUCT HIGHLIGHT
T Y P I C A L AP P L I C AT I O N
OF
S G 3 8 4 2 I N A F LY B A C K CO N V E R T E R
RST
HIGH RELIABILITY FEATURES
s AVAILABLE TO MIL-STD-883B AND DESC SMD s SCHEDULED FOR MIL-M38510 QPL LISTING s RADIATION DATA AVAILABLE s LINFINITY LEVEL "S" PROCESSING AVAILABLE
AC INPUT
IST VCC
SG3842
TA (C)
0 to 70 -25 to 85 -55 to 125 MIL-STD/883 DESC
M
Plastic DIP 8-pin
N
Plastic DIP 14-pin
SG3842N SG3843N SG2842N SG2843N -- -- -- -- --
PA C K A G E O R D E R I N F O R M AT I O N Plastic SOIC Plastic SOIC Ceramic DIP Ceramic DIP DM 8-pin D 14-pin Y 8-pin J 14-pin
SG3842DM SG3843DM SG2842DM SG2843DM -- -- -- -- -- SG3842D SG3843D SG2842D SG2843D -- -- -- -- -- SG3842Y SG3843Y SG2842Y SG2843Y SG1842Y SG1843Y SG3842J SG3843J SG2842J SG2843J SG1842J SG1843J
F 10-pin
-- -- -- -- -- -- -- --
Cer. Flatpack
L 20-pin
-- -- -- --
Ceramic LCC
SG3842M SG3843M SG2842M SG2843M -- -- -- -- --
SG1842L SG1843L SG1842L/883B SG1843L/883B
SG1842Y/883B SG1842J/883B SG1843Y/883B SG1843J/883B SG1842Y/DESC SG1842J/DESC
SG1842F/DESC SG1842L/DESC SG1843F/DESC SG1843L/DESC
-- -- SG1843Y/DESC SG1843J/DESC Note: All surface-mount packages are available in Tape & Reel.
F O R F U R T H E R I N F O R M AT I O N C A L L ( 7 1 4 ) 8 9 8 - 8 1 2 1
Copyright (c) 2000 Rev. 1.6 4/00
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841
1
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
A B S O L U T E M A X I M U M R AT I N G S
(Notes 1 & 2)
PACKAGE PIN OUTS
COMP VFB ISENSE RT/CT
1 2 3 4 8 7 6 5
Supply Voltage (ICC < 30mA) ............................................................... Self Limiting Supply Voltage (Low Impedance Source) ........................................................ 30V Output Current (Peak) ....................................................................................... 1A Output Current (Continuous) ....................................................................... 350mA Output Energy (Capacitive Load) ....................................................................... 5J Analog Inputs (Pins 2, 3) ................................................................. -0.3V to +6.3V Error Amp Output Sink Current ..................................................................... 10mA Power Dissipation at TA = 25C (DIL-8) ............................................................ 1W Operating Junction Temperature Hermetic (J, Y, F, L Packages) ................................................................... 150C Plastic (N, M, D, DM Packages) ................................................................ 150C Storage Temperature Range .......................................................... -65C to +150C Lead Temperature (Soldering, 10 Seconds) .................................................. 300C
Note 1. Exceeding these ratings could cause damage to the device. Note 2. All voltages are with respect to Pin 5. All currents are positive into the specified terminal.
VREF VCC OUTPUT GND
M & Y PACKAGE (Top View)
COMP VFB ISENSE RT/CT
1 2 3 4 8 7 6 5
VREF VCC OUTPUT GND
DM PACKAGE (Top View)
COMP N.C. VFB N.C. ISENSE N.C. RT/CT
1 2 3 4 5 6 7 14 13 12 11 10 9 8
T H E R M A L D ATA
M PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA N PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA DM PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA D PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA Y PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA J PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA F PACKAGE: THERMAL RESISTANCE-JUNCTION TO CASE, JC THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA L PACKAGE: THERMAL RESISTANCE-JUNCTION TO CASE, JC THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA 35C/W 120C/W
3 2
VREF N.C. VCC VC OUTPUT GND PWR GND
95C/W 65C/W 165C/W 120C/W 130C/W 80C/W 80C/W 145C/W
D PACKAGE (Top View)
COMP N.C. VFB N.C. ISENSE N.C. RT/CT
1 2 3 4 5 6 7 14 13 12 11 10 9 8
VREF N.C. VCC VC OUTPUT GROUND POWER GND
J & N PACKAGE (Top View)
1. COMP 2. VFB 3. ISENSE 4. RT/CT 5. POWER GND
1 2 3 4 5 10 9 8 7 6
10.VREF 9. VCC 8. VC 7. OUTPUT 6. GND
F PACKAGE (Top View)
1 20 19
Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow.
4 5 6 7 8
18 17 16 15 14
9 10 11 12 13
1. N.C. 2. COMP 3. N.C. 4. N.C. 5. VFB 6. N.C. 7. ISENSE 8. N.C. 9. N.C. 10. RT/CT
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
N.C. GROUND N.C. N.C. OUTPUT N.C. VCC N.C. N.C. VREF
L PACKAGE (Top View)
2
Copyright (c) 2000 Rev. 1.6 4/00
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
R E C O M M E N D E D O P E R AT I N G C O N D I T I O N S Parameter
Supply Voltage Range Output Current (Peak) Output Current (Continuous) Analog Inputs (Pin 2, Pin 3) Error Amp Output Sink Current Oscillator Frequency Range Oscillator Timing Resistor Oscillator Timing Capacitor Operating Ambient Temperature Range: SG1842/43 SG2842/43 SG3842/43 Note 3. Range over which the device is functional.
(Note 3)
Symbol
Recommended Operating Conditions Min. Typ. Max.
30 1 200 0 5 0.1 0.52 0.001 -55 -25 0 2.6 500 150 1.0 125 85 70
Units
V A mA V mA kHz K F C C C
RT CT
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1842/SG1843 with -55C TA 125C, SG2842/ SG2843 with -25C TA 85C, SG3842/SG3843 with 0C TA 70C, VCC = 15V (Note 7), RT = 10k, and CT = 3.3nF. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.)
Parameter Reference Section
Output Voltage Line Regulation Load Regulation Temperature Stability (Note 4) Total Output Variation (Note 4) Output Noise Voltage (Note 4) Long Term Stability (Note 4) Output Short Circuit
Symbol
Test Conditions
SG1842/43 SG2842/43 SG3842/43 Units Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
4.95 5.00 5.05 4.95 5.00 5.05 4.90 5.00 5.10 6 20 6 20 6 20 6 25 6 25 6 25 0.2 0.4 0.2 0.4 0.2 0.4 4.90 5.10 4.90 5.10 4.82 5.18 50 50 50 5 25 5 25 5 25 -30 -100 -180 -30 -100 -180 -30 -100 -180 47 52 0.2 5 1.7 8.3 57 1 47 52 0.2 5 1.7 8.4 57 1 47 52 0.2 5 1.7 8.4 57 1 V mV mV mV/C V V mV mA kHz % % V mA mA V A dB MHz dB mA mA V V
TJ = 25C, IO = 1mA 12 VIN 25V 1 IO 20mA Line, Load, Temp. 10Hz f 10kHz, TJ = 25C TA = 125C, 1000hrs
VN
Oscillator Section
Initial Accuracy Voltage Stability Temperature Stability (Note 4) Amplitude Discharge Current TJ = 25C 12 VCC 25V TMIN TA TMAX VRT/CT (Peak to Peak) TJ = 25C TMIN TA TMAX VCOMP = 2.5V AVOL PSRR 2 VO 4V TJ = 25C 12 VCC 25V VVFB = 2.7V, VCOMP = 1.1V VVFB = 2.3V, VCOMP = 5V VVFB = 2.3V, RL = 15K to gnd VVFB = 2.7V, RL = 15K to VREF
7.8 7.0
8.8 9.0
7.5 7.2
9.3 9.5
7.5 7.2
9.3 9.5
Error Amp Section
Input Voltage Input Bias Current Open Loop Gain Unity Gain Bandwidth (Note 4) Power Supply Rejection Ratio Output Sink Current Output Source Current VOUT High VOUT Low 2.45 2.50 2.55 2.45 2.50 2.55 2.42 2.50 2.58 -0.3 -1 -0.3 1 -0.3 -2 65 90 65 90 65 90 0.7 1 0.7 1 0.7 1 60 70 60 70 60 70 2 6 2 6 2 6 -0.5 -0.8 -0.5 -0.8 -0.5 -0.8 5 6 5 6 5 6 0.7 1.1 0.7 1.1 0.7 1.1
(Electrical Characteristics continue next page.)
Copyright (c) 2000 Rev. 1.6 4/00
3
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
ELECTRICAL CHARACTERISTICS Parameter Current Sense Section
Gain (Notes 5 & 6) Maximum Input Signal (Note 5) Power Supply Rejection Ratio (Note 5) PSRR Input Bias Current Delay to Output (Note 4) VCOMP = 5V 12 VCC 25V 2.85 0.9 3 1 70 -2 150 0.1 1.5 13.5 13.5 50 50 16 8.4 10 7.6 95
(Cont'd.)
Symbol
Test Conditions
SG1842/43 SG2842/43 SG3842/43 Units Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
3.15 2.85 1.1 0.9 -10 300 0.4 2.2 13 12 150 150 17 9.0 11 8.3 100 0 1 17 15 7.8 9 7.0 90 3 1 70 -2 150 0.1 1.5 13.5 13.5 50 50 16 8.4 10 7.6 95 3.15 2.85 1.1 0.9 -10 300 0.4 2.2 13 12 150 150 17 9.0 11 8.2 100 0 14.5 7.8 8.5 7.0 90 3 1 70 -2 150 0.1 1.5 13.5 13.5 50 50 16 8.4 10 7.6 95 3.15 1.1 -10 300 0.4 2.2 V/V V dB A ns V V V V ns ns V V V V % %
Output Section
Output Low Level Output High Level Rise Time Fall Time ISINK = 20mA ISINK = 200mA ISOURCE = 20mA ISOURCE = 200mA TJ = 25C, CL = 1nF TJ = 25C, CL = 1nF 1842 1843 1842 1843
13 12
150 150 17.5 9.0 11.5 8.2 100 0
Under-Voltage Lockout Section
Start Threshold Min. Operation Voltage After Turn-On 15 7.8 9 7.0 93
PWM Section
Maximum Duty Cycle Minimum Duty Cycle
Power Consumption Section
Start-Up Current Operating Supply Current VCC Zener Voltage VFB = VISENSE = 0V ICC = 25mA 0.5 1 0.5 1 mA 11 17 11 17 mA 34 34 V VCOMP 6. Gain defined as: A = V ; 0 VISENSE 0.8V. ISENSE 7. Adjust VCC above the start threshold before setting at 15V. 0.5 11 34
Notes: 4. These parameters, although guaranteed, are not 100% tested in production. 5. Parameter measured at trip point of latch with VVFB = 0.
4
Copyright (c) 2000 Rev. 1.6 4/00
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
BLOCK DIAGRAM
VCC* 34V
UVLO S/R 5V REF
GROUND** 16V (1842) 8.4V (1843) 2.5V
6V (1842) 0.8V (1843)
VREF 5.0V 50mA
INTERNAL BIAS
VREF GOOD LOGIC RT/CT OSCILLATOR
VC*
OUTPUT ERROR AMP 2R R 1V
S R
CURRENT SENSE COMPARATOR PWM LATCH POWER GROUND**
VFB COMP CURRENT SENSE
* - VCC and VC are internally connected for 8 pin packages. ** - POWER GROUND and GROUND are internally connected for 8 pin packages.
Copyright (c) 2000 Rev. 1.6 4/00
5
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
GRAPH / CURVE INDEX
FIGURE INDEX
Characteristic Curves
FIGURE # 1. 2. 3. 4. 5. 6. 7. 8. 9. DROPOUT VOLTAGE vs. TEMPERATURE OSCILLATOR TEMPERATURE STABILITY CURRENT SENSE TO OUTPUT DELAY vs. TEMPERATURE OUTPUT DUTY CYCLE vs. TEMPERATURE START-UP CURRENT vs. TEMPERATURE REFERENCE VOLTAGE vs. TEMPERATURE START-UP VOLTAGE THRESHOLD vs. TEMPERATURE START-UP VOLTAGE THRESHOLD vs. TEMPERATURE OSCILLATOR DISCHARGE CURRENT vs. TEMPERATURE FIGURE # FIGURE #
Application Information
13. OSCILLATOR TIMING CIRCUIT 14. OSCILLATOR FREQUENCY vs. RT FOR VARIOUS CT
Typical Applications Section
15. CURRENT SENSE SPIKE SUPPRESSION 16. MOSFET PARASITIC OSCILLATIONS 17. BIPOLAR TRANSISTOR DRIVE 18. ISOLATED MOSFET DRIVE 19. ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL WITH SOFTSTART 20. EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT SYNCHRONIZATION 21. OSCILLATOR CONNECTION 22. ERROR AMPLIFIER CONNECTION 23. SLOPE COMPENSATION 24. OPEN LOOP LABORATORY FIXTURE 25. OFF-LINE FLYBACK REGULATOR
10. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT AND TEMPERATURE (SINK TRANSISTOR) 11. CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT 12. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT AND TEMPERATURE (SOURCE TRANSISTOR)
6
Copyright (c) 2000 Rev. 1.6 4/00
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
CHARACTERISTIC CURVES
FIGURE 1. -- DROPOUT VOLTAGE vs. TEMPERATURE
FIGURE 2. -- OSCILLATOR TEMPERATURE STABILITY
2
Minimum Operating Voltage - (V)
10.0
0
SG1842
VIN = 15V Duty Cycle = 50%
Frequency Drift - (%)
SG1843
9.6 9.2 8.8
-2 -4 -6
8.4 8.0
-8 -10
-75
-50
-25
0
25
50
75
100
125
-75
-50
-25
0
25
50
75
100
125
Junction Temperature - (C)
Junction Temperature - (C)
FIGURE 3. -- CURRENT SENSE TO OUTPUT DELAY vs. TEMPERATURE
FIGURE 4. -- OUTPUT DUTY CYCLE vs. TEMPERATURE
200kHz
220 50
Current Sense Delay - (nS)
Output Duty Cycle - (%)
200 180
49 48 47 46 45 44
100kHz 50kHz
50kHz
VPIN3 = 1.1V
160
100kHz 200kHz
140 120
-75
-50
-25
0
25
50
75
100
125
-75
-50
-25
0
25
50
75
100
125
Junction Temperature - (C)
Junction Temperature - (C)
Copyright (c) 2000 Rev. 1.6 4/00
7
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
CHARACTERISTIC CURVES
FIGURE 5. -- START-UP CURRENT vs. TEMPERATURE
FIGURE 6. -- REFERENCE VOLTAGE vs. TEMPERATURE
5.02
0.7
Start-Up Current - (mA)
Reference Voltage - (V)
SG1842
0.6 0.5 0.4
5.01
VCC = 15V
5.00
4.99
0.3
SG1843
0.2
4.98
-75
-50
-25
0
25
50
75
100
125
-75
-50
-25
0
25
50
75
100
125
Junction Temperature - (C)
Junction Temperature - (C)
FIGURE 7. -- START-UP VOLTAGE THRESHOLD vs. TEMPERATURE
FIGURE 8. -- START-UP VOLTAGE THRESHOLD vs. TEMPERATURE
16.08
8.32
SG1843
16.06
Reference Voltage - (V)
Start Up Voltage - (V)
8.30 8.28 8.26 8.24 8.22 8.20 8.18 -75
SG1842
16.04
16.02
16.00
15.98
-50 -25 0 25 50 75 100 125
-75
-50
-25
0
25
50
75
100
125
Junction Temperature - (C)
Junction Temperature - (C)
8
Copyright (c) 2000 Rev. 1.6 4/00
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
CHARACTERISTIC CURVES
FIGURE 9. -- OSCILLATOR DISCHARGE CURRENT vs. TEMPERATURE
8.2
FIGURE 10. -- OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT & TEMPERATURE
2.5
Oscillator Discharge Current - (mA)
8.0
2.0
Saturation Voltage - (V)
C -55
C +25
7.8
1.5
5C +12
7.6
1.0
VIN = 15V Duty Cycle < 5%
0.5
7.4
7.2 -75 -50 -25 0 25 50 75 100 125
0 100 200 300 400 500
Junction Temperature - (C)
Output Current - (mA)
FIGURE 11. -- CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT
1.0 0.9
FIGURE 12. -- OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT & TEMPERATURE
Current Sense Threshold - (V)
0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1.0 2.0 3.0 4.0 5.0
4.0
Saturation Voltage - (V)
12 5C 25 C -55 C
VIN = 15V Duty Cycle < 5%
C 25 +1 5C +2
3.0
C -55
C +25
2.0
5C +12
1.0
0 100 200 300 400 500
Error Amp Output Voltage - (V)
Output Current - (mA)
Copyright (c) 2000 Rev. 1.6 4/00
9
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
A P P L I C AT I O N I N F O R M AT I O N OSCILLATOR The oscillator of the 1842/43 family of PWM's is designed such that many values of RT and CT will give the same oscillator frequency, but only one combination will yield a specific duty cycle at a given frequency. Given: Frequency f Maximum Duty Cycle Dm A set of formulas are given to determine the values of RT and CT for a given frequency and maximum duty cycle. (Note: These formulas are less accurate for smaller duty cycles or higher frequencies. This will require trimming of RT or CT to correct for this error.) Example: A Flyback power supply requires a maximum of 45% duty cycle at a switching frequency of 50kHz. What are the values of RT and CT? Given: f = 50kHz Dm = 0.45
(1.76)1/Dm -1 Calculate: RT = 267 () (1-Dm)/Dm - 1 (1.76) where .3 < Dm < .95 CT = 1.86 * Dm f * RT (F)
1000
(1.76)1/.045 -1 Calculate: RT = 267 (1.76).55/.45 - 1 = 674 CT = 1.86 * 0.45 = .025F 50000 * 674
For Duty-Cycles above 95% use:
VREF
f - (kHz)
100
RT RT/CT CT GND
10
RT = 680 W RT = 2kW RT = 5kW RT = 10k W RT = 20k W RT = 30k W RT = 50k W RT = 7 RT = 0kW 100 kW
1.86 F RT CT
where RT 5k
1 .001
.002
.005
.01
.02
.05
0.1
CT Value - (F)
FIGURE 14 -- OSCILLATOR FREQUENCY vs. RT FOR VARIOUS CT
FIGURE 13 -- OSCILLATOR TIMING CIRCUIT
10
Copyright (c) 2000 Rev. 1.6 4/00
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
T Y P I C A L A P P L I C AT I O N C I R C U I T S
Pin numbers referenced are for 8-pin package and pin numbers in parenthesis are for 14-pin package.
VCC VIN
VIN
VCC
7 (12)
7 (12)
7 (11) 6 (10) 5 (8) R 3 (5) C
Q1
7 (11) R1 SG1842/43
IPK
Q1
SG1842/43
6 (10)
RS
IPK(MAX) = 1.0V RS
5 (8) RS 3 (5)
FIGURE 15. -- CURRENT-SENSE SPIKE SUPPRESSION The RC low pass filter will eliminate the leading edge current spike caused by parasitics of Power MOSFET.
FIGURE 16. -- MOSFET PARASITIC OSCILLATIONS A resistor (R1) in series with the MOSFET gate reduce overshoot and ringing caused by the MOSFET input capacitance and any inductance in series with the gate drive. (Note: It is very important to have a low inductance ground path to insure correct operation of the I.C. This can be done by making the ground paths as short and as wide as possible.)
VCC VIN Isolation Boundary
Q1
IB VC + R2 VC1 R1| R2 _ | VC VC1 7 (11) R2 SG1842/43 6 (10) C1 R1 Q1
SG1842/43 5 (8)
VIN
7 (12) 7 (11) 6 (10)
Waveforms + 0 _ 50% DC
R
+ 0 _ 25% DC
3 (5)
5 (8)
C
RS
NS
NP
3 (5) RS
IPK =
V (PIN 1) - 1.4 3RS

NP NS

FIGURE 17. -- BIPOLAR TRANSISTOR DRIVE The 1842/43 output stage can provide negative base current to remove base charge of power transistor (Q1) for faster turn off. This is accomplished by adding a capacitor (C1) in parallel with a resistor (R1). The resistor (R1) is to limit the base current during turn on.
FIGURE 18. -- ISOLATED MOSFET DRIVE Current transformers can be used where isolation is required between PWM and Primary ground. A drive transformer is then necessary to interface the PWM output with the MOSFET.
Copyright (c) 2000 Rev. 1.6 4/00
11
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
T Y P I C A L A P P L I C AT I O N C I R C U I T S
VCC VIN
(continued)
8 (14)
7 (12) 8 (14) 7 (11) 4 (7) 2 (3) Q1
RA 6
8
4
SG1842/43
RB 2 1 5 (9) To other SGX842/43 555 TIMER 3 4 (7)
SG1842/43
6 (10) 5 (8)
I
1N4148
1 (1) R2 MPSA63 R1 5 (9)
3 (5)
VCS RS
C
VCS R1 Where: VCS = 1.67 and VC.S.MAX = 1V (Typ.) RS R1+R2 V - 1.3 R1 R2 tSOFTSTART = -ln 1 - EAO R R +R C 5 1 1 2 IPK =
f= f=
1.44 (RA + 2RB)C RB RA + 2RB
R1+R 2
where; VEAO voltage at the Error Amp Output under minimum line and maximum load conditions. FIGURE 19. -- ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL WITH SOFTSTART Softstart and adjustable peak current can be done with the external circuitry shown above. FIGURE 20. -- EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT SYNCHRONIZATION Precision duty cycle limiting as well as synchronizing several 1842/ 1843's is possible with the above circuitry.
2.8V 1.1V
5V
8 (14) RT
2.5V SG1842/43 0.5mA
4 (7) CT SG1842/43
2 (3) Ri RF 1 (1) RF 10K
Discharge Current
Id = 8.2mA
FIGURE 21. -- OSCILLATOR CONNECTION The oscillator is programmed by the values selected for the timing components RT and CT. Refer to application information for calculation of the component values.
FIGURE 22. -- ERROR AMPLIFIER CONNECTION Error amplifier is capable of sourcing and sinking current up to 0.5mA.
12
Copyright (c) 2000 Rev. 1.6 4/00
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
T Y P I C A L A P P L I C AT I O N C I R C U I T S
(continued)
VCC VIN
SG1842/43
5V 8(14) 5V S R RT 2.5V VREF GOOD LOGIC RSLOPE From VO 4(7) OSCILLATOR CT 2R Ri Rd 2(3) CF RF 1(1) 5(9) ERROR AMP R 1V PWM LATCH C.S. COMP 5V REF INTERNAL BIAS
7(12) VO
UVLO
2N222A
7(11) Q1 6(10)
5(8) R 3(5) C RS
FIGURE 23. -- SLOPE COMPENSATION Due to inherent instability of current mode converters running above 50% duty cycle, a slope compensation should be added to either current sense pin or the error amplifier. Figure 23 shows a typical slope compensation technique.
VREF RT 2N2222 4.7K 100K 1K ERROR AMP ADJUST 4.7K 5K ISENSE ADJUST 1
SG1842/43
COMP VREF 8
A
VCC
2
VFB
VCC
7
0.1F
0.1F
1K OUTPUT
3
ISENSE
OUTPUT
6
4
RTCT
GROUND
5
CT
GROUND
FIGURE 24. -- OPEN LOOP LABORATORY FIXTURE High-peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected to pin 5 in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3.
Copyright (c) 2000 Rev. 1.6 4/00
13
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
P
RODUCTION
D
ATA
S
HEET
T Y P I C A L A P P L I C AT I O N C I R C U I T S
(continued)
TI USD735
4.7W 1W 220F 250V 673-3 AC INPUT 16V 20kW 56kW 1W 0.01pF 400V
4700F 10V
5V 2-5A
1N3613
1N3613
SG1842
VFB VCC 0.01F
10F 20V
820pF
2.5kW
150kW 3.6kW
COMP
27W
100pF VREF 10kW RT/CT CUR SEN GND
20kW 1kW 470pF
UFN432
OUT
T1: Coilcraft E - 4140 - b Primary - 97 turns single AWG 24 Secondary - 4 turns 4 parallel AWG 22 Control - 9 turns 3 parallel AWG 28
0.85W ISOLATION BOUNDARY
0.01F
.0047F
FIGURE 25. -- OFF-LINE FLYBACK REGULATOR
SPECIFICATIONS
Input line voltage: Input frequency: Switching frequency: Output power: Output voltage: Output current: Line regulation: Load regulation: Efficiency @ 25 Watts, VIN = 90VAC: VIN = 130VAC: Output short-circuit current: 90VAC to 130VAC 50 or 60Hz 40KHz 10% 25W maximum 5V +5% 2 to 5A 0.01%/V 8%/A* 70% 65% 2.5Amp average * This circuit uses a low-cost feedback scheme in which the DC voltage developed from the primary-side control winding is sensed by the SG1842 error amplifier. Load regulation is therefore dependent on the coupling between secondary and control windings, and on transformer leakage inductance.
1N3613
14
Copyright (c) 2000 Rev. 1.6 4/00

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